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VLSI Design Interview Questions With Answers – Ebook Most frequently asked VLSI interview questions answered Search Main menu Skip to primary content Skip to secondary content Home Answers_to_Questions Contact Post navigation ← Older posts Dynamic Gates Posted on October 4, 2012 by admin Reply Dynamic gates use clock for their normal operation as opposed to the static gates, which don’t use clocks. Dynamic gates use NMOS or PMOS logic. It doesn’t use CMOS logic like regular static gates. Because it uses either NMOS or PMOS logic and not CMOS logic, it usually has fewer transistors compared to static gates. Although there are extra transistors given that it uses clocks. Figure : NMOS pull down logic for NOR gate. The figure shows the pull down NMOS logic for a NOR gate. This pull down structure is used in the dynamic gates. How dynamic gates work : In static gates, inputs switch and after a finite input to output delay, output possibly switches to the expected state. Figure : Dynamic

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